# 门描述符(32 位)

| 63            48 | 47  | 46  45 | 44  | 43   40   | 39   32  |
| ---------------- | --- | ------ | --- | --------- | -------- |
| Offset           | P   | DPL    | 0   | Gate Type | Reserved |

| 31            16 | 15                             0 |
| ---------------- | -------------------------------- |
| Segment Selector | offset                           |

- **Offset**: A 32-bit value, split in two parts. It represents the address of the entry point of the Interrupt Service Routine.
- **Selector**: A Segment Selector with multiple fields which must point to a valid code segment in your GDT.
- **Gate Type**: A 4-bit value which defines the type of gate this Interrupt Descriptor represents. There are five valid type values:
  - 0b0101 or 0x5: Task Gate, note that in this case, the Offset value is unused and should be set to zero.
  - 0b0110 or 0x6: 16-bit Interrupt Gate
  - 0b0111 or 0x7: 16-bit Trap Gate
  - 0b1110 or 0xE: 32-bit Interrupt Gate
  - 0b1111 or 0xF: 32-bit Trap Gate
- **DPL**: A 2-bit value which defines the CPU Privilege Levels which are allowed to access this interrupt via the INT instruction. Hardware interrupts ignore this mechanism.
- **P**: Present bit. Must be set (1) for the descriptor to be valid.

For more information, see **Section 6.11: IDT Descriptors** and **Figure 6-2: IDT Gate Descriptors** of the [Intel Software Developer Manual, Volume 3-A][0].

**Example Code**
C Struct:

```c
struct InterruptDescriptor32 {
   uint16_t offset_1;        // offset bits 0..15
   uint16_t selector;        // a code segment selector in GDT or LDT
   uint8_t  zero;            // unused, set to 0
   uint8_t  type_attributes; // gate type, dpl, and p fields
   uint16_t offset_2;        // offset bits 16..31
};
```

Example type_attributes values that people are likely to use (assuming DPL is 0):

- 32-bit Interrupt Gate: 0x8E (p=1, dpl=0b00, type=0b1110 => type_attributes=0b1000_1110=0x8E)
- 32-bit Trap Gate: 0x8F (p=1, dpl=0b00, type=0b1111 => type_attributes=1000_1111b=0x8F)
- Task Gate: 0x85 (p=1, dpl=0b00, type=0b0101 => type_attributes=0b1000_0101=0x85)

[0]: https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.html